init

tools/builtInChips/ALU.hdl

@@ -0,0 +1,55 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/ALU.hdl
+
+/**
+ * The ALU. Computes one of the following functions:
+ * x+y, x-y, y<>x, 0, 1, -1, x, y, -x, -y, !x, !y,
+ * x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs.
+ * Which function to compute is determined by 6 input bits 
+ * denoted zx, nx, zy, ny, f, no.
+ * The computed function's value is called "out".
+ * In addition to computing out, the ALU computes two 
+ * 1-bit outputs called zr and ng:
+ * if out == 0, zr = 1; otherwise zr = 0;
+ * If out < 0, ng = 1; otherwise ng = 0.
+ * The 6-bit combinations (zx,nx,zy,ny,f,no) and 
+ * their effect are documented in the book. 
+ */
+
+// Implementation: the ALU manipulates the x and y
+// inputs and then operates on the resulting values, 
+// as follows:
+// if (zx  == 1) sets x = 0        // 16-bit constant
+// if (nx  == 1) sets x = ~x       // bitwise "not"
+// if (zy  == 1) sets y = 0        // 16-bit constant
+// if (ny  == 1) sets y = ~y       // bitwise "not"
+// if (f   == 1) sets out = x + y  // integer 2's-complement addition
+// if (f   == 0) sets out = x & y  // bitwise And
+// if (no  == 1) sets out = ~out   // bitwise Not
+// if (out == 0) sets zr = 1
+// if (out < 0)  sets ng = 1
+
+
+CHIP ALU {
+
+    IN  // 16-bit inputs:
+        x[16], y[16],
+        // Control bits:
+        zx, // Zero the x input
+        nx, // Negate the x input
+        zy, // Zero the y input
+        ny, // Negate the y input
+        f,  // Function code: 1 for add, 0 for and
+        no; // Negate the out output
+
+    OUT // 16-bit output
+        out[16],
+
+        // ALU output flags
+        zr, // 1 if out=0, 0 otherwise
+        ng; // 1 if out<0, 0 otherwise
+
+    BUILTIN ALU;
+}

tools/builtInChips/ARegister.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/ARegister.hdl
+
+/**
+ * A 16-Bit register called "A Register". 
+ * If load[t-1]=1 then out[t] = in[t-1]
+ * else out does not change (out[t] = out[t-1])
+ *
+ * This built-in chip implementation has the side effect of 
+ * providing a GUI representation of a 16-bit register
+ * called "A register" (typically used to store an address).
+ */
+
+CHIP ARegister {
+
+    IN  in[16], load;
+    OUT out[16];
+
+    BUILTIN ARegister;
+    CLOCKED in, load;
+}
+

tools/builtInChips/Add16.hdl

@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Add16.hdl
+
+/*
+ * Adds two 16-bit values.
+ * The most significant carry bit is ignored.
+ */
+
+CHIP Add16 {
+
+    IN  a[16], b[16];
+    OUT out[16];
+
+    BUILTIN Add16;
+}
+

tools/builtInChips/And.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/And.hdl
+
+/**
+ * And gate: out = 1 if {a == 1 and b == 1}, 0 otherwise  
+ */
+
+CHIP And {
+
+    IN  a, b;
+    OUT out;
+
+    BUILTIN And;
+}

tools/builtInChips/And16.hdl

@@ -0,0 +1,17 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/And16.hdl
+
+/**
+ * 16-bit-wise And gate: for i = 0..15: out[i] = a[i] and b[i]
+ */
+
+CHIP And16 {
+
+    IN  a[16], b[16];
+    OUT out[16];
+
+    BUILTIN And;
+}
+

tools/builtInChips/Bit.hdl

@@ -0,0 +1,19 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Bit.hdl
+
+/**
+ * 1-bit register.
+ * If load[t] == 1 then out[t+1] = in[t]
+ *                 else out[t+1] = out[t] (no change)
+ */
+
+CHIP Bit {
+
+    IN  in, load;
+    OUT out;
+
+    BUILTIN Bit;
+    CLOCKED in, load;
+}

tools/builtInChips/DFF.hdl

@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/DFF.hdl
+
+/**
+ * Data Flip-flop: out(t) = in(t-1) 
+ * where t is the current time unit, or clock cycle.
+ */
+
+CHIP DFF {
+
+    IN  in;
+    OUT out;
+
+    BUILTIN DFF;
+    CLOCKED in;
+}

tools/builtInChips/DMux.hdl

@@ -0,0 +1,20 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/DMux.hdl
+
+/**
+ * Dmultiplexor.  
+ * {a,b} = {in,0} if sel == 0
+ *         {0,in} if sel == 1
+ */
+
+ 
+CHIP DMux {
+
+    IN  in, sel;
+    OUT a, b;
+
+    BUILTIN DMux;
+}
+

tools/builtInChips/DMux4Way.hdl

@@ -0,0 +1,22 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/DMux4Way.hdl
+
+/**
+ * 4-way demultiplexor.  
+ * {a,b,c,d} = {in,0,0,0} if sel == 00
+ *             {0,in,0,0} if sel == 01
+ *             {0,0,in,0} if sel == 10
+ *             {0,0,0,in} if sel == 11
+ */
+
+
+CHIP DMux4Way {
+
+    IN  in, sel[2];
+    OUT a, b, c, d;
+
+    BUILTIN DMux4Way;
+}
+

tools/builtInChips/DMux8Way.hdl

@@ -0,0 +1,22 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/DMux8Way.hdl
+
+/**
+ * 8-way demultiplexor.  
+ * {a,b,c,d,e,f,g,h} = {in,0,0,0,0,0,0,0} if sel == 000
+ *                     {0,in,0,0,0,0,0,0} if sel == 001
+ *                     etc.
+ *                     {0,0,0,0,0,0,0,in} if sel == 111
+ */
+
+
+CHIP DMux8Way {
+
+    IN  in, sel[3];
+    OUT a, b, c, d, e, f, g, h;
+
+    BUILTIN DMux8Way;
+}
+

tools/builtInChips/DRegister.hdl

@@ -0,0 +1,24 @@
+// This file is part of the materials accompanying the book
+// "The Elements of Computing Systems" by Nisan and Schocken, 
+// MIT Press. Book site: www.idc.ac.il/tecs
+// File name: tools/builtIn/DRegister.hdl
+
+/**
+ * A 16-Bit register called "D Register". 
+ * If load[t-1]=1 then out[t] = in[t-1]
+ * else out does not change (out[t] = out[t-1])
+ *
+ * This built-in chip implementation has the side effect of 
+ * providing a GUI representation of a 16-bit register
+ * called "D register" (typically used to store data).
+ */
+
+CHIP DRegister {
+
+    IN  in[16], load;
+    OUT out[16];
+
+    BUILTIN DRegister;
+    CLOCKED in, load;
+}
+

tools/builtInChips/FullAdder.hdl

@@ -0,0 +1,19 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/FullAdder.hdl
+
+/**
+ * Full adder. Computes sum, the least significant bit of 
+ * a + b + c, and carry, the most significant bit of a + b + c.
+ */
+
+CHIP FullAdder {
+
+    IN  a, b, c;
+    OUT sum,     // LSB of a + b + c
+        carry;   // MSB of a + b + c
+
+    BUILTIN FullAdder;
+}
+

tools/builtInChips/HalfAdder.hdl

@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/HalfAdder.hdl
+
+/**
+ * Half adder. Computes sum, the least significnat bit of a + b,
+ * and carry, the most significnat bit of a + b.
+ */
+
+CHIP HalfAdder {
+
+    IN  a, b;
+    OUT sum,   // LSB of a + b
+        carry; // MSB of a + b
+
+    BUILTIN HalfAdder;
+}

tools/builtInChips/Inc16.hdl

@@ -0,0 +1,18 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Inc16.hdl
+
+/**
+ * 16-bit incrementer.  out = in + 1 (16-bit addition).
+ * Overflow is neither detected nor handled.
+ */
+
+CHIP Inc16 {
+
+    IN  in[16];
+    OUT out[16];
+
+    BUILTIN Inc16;
+}
+

tools/builtInChips/Keyboard.hdl

@@ -0,0 +1,23 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Keyboard.hdl
+
+/**
+ * The keyboard (memory map).
+ * Outputs the code of the currently pressed key.
+ *
+ * The built-in chip implementation has two side effects supplied 
+ * by the simulator. First, the keyboard memory map is continuously 
+ * being refreshed from the physical keyboard unit. Second, it 
+ * displays a keyboard icon and data entry GUI.
+ */
+
+CHIP Keyboard {
+
+    OUT out[16];   // The ASCII code of the pressed key, 
+                   // or 0 if no key is currently pressed, 
+                   // or one the special codes listed in Figure 5.5.
+
+    BUILTIN Keyboard;
+}

tools/builtInChips/Mux.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Mux.hdl
+
+/** 
+ * Multiplexor. If sel == 1 then out = b else out = a.
+ */
+
+CHIP Mux {
+
+    IN  a, b, sel;
+    OUT out;
+
+    BUILTIN Mux;
+}

tools/builtInChips/Mux16.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Mux16.hdl
+
+/**
+ * 16 bit multiplexor. If sel == 1 then out = b else out = a.
+ */
+
+CHIP Mux16 {
+
+    IN  a[16], b[16], sel;
+    OUT out[16];
+
+    BUILTIN Mux;
+}

tools/builtInChips/Mux4Way16.hdl

@@ -0,0 +1,21 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Mux4Way16.hdl
+
+/**
+ * 4-way 16-bit multiplexor.  
+ * out = a if sel == 00
+ *       b if sel == 01
+ *       c if sel == 10
+ *       d if sel == 11
+ */
+
+
+CHIP Mux4Way16 {
+     
+    IN a[16], b[16], c[16], d[16], sel[2];
+    OUT out[16];
+
+    BUILTIN Mux4Way16;
+}

tools/builtInChips/Mux8Way16.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Mux8Way16.hdl
+
+/**
+ * 8-way 16-bit multiplexor.  
+ * out = a if sel == 000
+ *       b if sel == 001
+ *       etc.
+ *       h if sel == 111
+ */
+
+ 
+CHIP Mux8Way16 {
+
+    IN  a[16], b[16], c[16], d[16],
+        e[16], f[16], g[16], h[16],
+        sel[3];
+
+    OUT out[16];
+
+    BUILTIN Mux8Way16;
+}

tools/builtInChips/Nand.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Nand.hdl
+
+/**
+ * Nand gate: out = a Nand b.
+ */
+
+CHIP Nand {
+
+    IN  a, b;
+    OUT out;
+
+    BUILTIN Nand;
+}

tools/builtInChips/Not.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Not.hdl
+
+/**
+ * Not gate: out = not in 
+ */
+
+CHIP Not {
+
+    IN  in;
+    OUT out;
+
+    BUILTIN Not;
+}

tools/builtInChips/Not16.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Not16.hdl
+
+/**
+ * 16-bit Not gate: for i = 0..15: out[i] = not in[i]
+ */
+
+CHIP Not16 {
+
+    IN  in[16];
+    OUT out[16];
+
+    BUILTIN Not16;
+}

tools/builtInChips/Or.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Or.hdl
+
+
+/**
+ * Or gate: out = 1 if {a == 1 or b == 1}, 0 otherwise  
+ */
+
+CHIP Or {
+
+    IN  a, b;
+    OUT out;
+
+    BUILTIN Or;

tools/builtInChips/Or16.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Or16.hdl
+
+/**
+ * 16-bit bitwise Or gate: for i = 0..15 out[i] = a[i] or b[i].
+ */
+
+CHIP Or16 {
+
+    IN  a[16], b[16];
+    OUT out[16];
+
+    BUILTIN Or;
+}

tools/builtInChips/Or8Way.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Or8Way.hdl
+
+
+/**
+ * 8-way Or gate: out = in[0] or in[1] or ... or in[7].
+ */
+
+CHIP Or8Way {
+
+    IN  in[8];
+    OUT out;
+
+    BUILTIN Or8Way;

tools/builtInChips/PC.hdl

@@ -0,0 +1,22 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/PC.hdl
+
+/**
+ * 16-bit counter with load and reset controls.
+ *
+ * If reset(t-1) then out(t) = 0
+ *    else if load(t-1) then out(t) = in(t-1)
+ *         else if inc(t-1) then out(t) = out(t-1) + 1 (integer addition)
+ *              else out(t) = out(t-1)
+ */
+
+CHIP PC {
+
+    IN  in[16], load, inc, reset;
+    OUT out[16];
+
+    BUILTIN PC;
+    CLOCKED in, load, inc, reset;
+}

tools/builtInChips/RAM16K.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/RAM16K.hdl
+
+/**
+ * Memory of 16K registers, each 16-bit wide.  
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = RAM16K[address(t)](t)
+ *     Write: If load(t-1) then RAM16K[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load=1, the in value is loaded 
+ * into the memory location specified by address.  This value becomes 
+ * available through the out output starting from the next time step.
+ */
+
+CHIP RAM16K {
+
+    IN  in[16], load, address[14];
+    OUT out[16];
+
+    BUILTIN RAM16K;
+    CLOCKED in, load;
+}

tools/builtInChips/RAM4K.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/RAM4K.hdl
+
+/**
+ * Memory of 4K registers, each 16-bit wide.  
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = RAM4K[address(t)](t)
+ *     Write: If load(t-1) then RAM4K[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load == 1, the in value is loaded 
+ * into the memory location specified by address.  This value becomes 
+ * available through the out output starting from the next time step.
+ */
+
+CHIP RAM4K {
+
+    IN  in[16], load, address[12];
+    OUT out[16];
+
+    BUILTIN RAM4K;
+    CLOCKED in, load;
+}

tools/builtInChips/RAM512.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/RAM512.hdl
+
+/**
+ * Memory of 512 registers, each 16-bit wide.  
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = RAM512[address(t)](t)
+ *     Write: If load(t-1) then RAM512[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load == 1, the in value is loaded 
+ * into the memory location specified by address.  This value becomes 
+ * available through the out output starting from the next time step.
+ */
+
+CHIP RAM512 {
+
+    IN  in[16], load, address[9];
+    OUT out[16];
+
+    BUILTIN RAM512;
+    CLOCKED in, load;
+}

tools/builtInChips/RAM64.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/RAM64.hdl
+
+/**
+ * Memory of 64 registers, each 16-bit wide.  
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = RAM64[address(t)](t)
+ *     Write: If load(t-1) then RAM64[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load == 1, the in value is loaded 
+ * into the memory location specified by address.  This value becomes 
+ * available through the out output starting from the next time step.
+ */
+
+CHIP RAM64 {
+
+    IN in[16], load, address[6];
+    OUT out[16];
+
+    BUILTIN RAM64;
+    CLOCKED in, load;
+}

tools/builtInChips/RAM8.hdl

@@ -0,0 +1,24 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/RAM8.hdl
+
+/**
+ * Memory of 8 registers, each 16-bit wide.  
+ * The chip facilitates read and write operations, as follows:
+ *     Read:  out(t) = RAM8[address(t)](t)
+ *     Write: If load(t-1) then RAM8[address(t-1)](t) = in(t-1)
+ * In words: the chip always outputs the value stored at the memory 
+ * location specified by address. If load == 1, the in value is loaded 
+ * into the memory location specified by address.  This value becomes 
+ * available through the out output starting from the next time step.
+ */
+
+CHIP RAM8 {
+
+    IN  in[16], load, address[3];
+    OUT out[16];
+
+    BUILTIN RAM8;
+    CLOCKED in, load;
+}

tools/builtInChips/ROM32K.hdl

@@ -0,0 +1,30 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/ROM32K.hdl
+
+/**
+ * Read-Only memory (ROM) of 16K registers, each 16-bit wide.
+ * The chip is designed to facilitate data read, as follows:
+ *     out(t) = ROM32K[address(t)](t)
+ * In words: the chip always outputs the value stored at the 
+ * memory location specified by address.
+ *
+ * The built-in chip implementation has a GUI side-effect, 
+ * showing an array-like component that displays the ROM's 
+ * contents. The ROM32K chip is supposed to be pre-loaded with 
+ * a machine language program. To that end, the built-in chip
+ * implementation also knows how to handle the "ROM32K load Xxx"
+ * script command, where Xxx is the name of a text file containing 
+ * a program written in the Hack machine language.  When the 
+ * simulator encounters such a command in a test script, the code 
+ * found in the file is loaded into the simulated ROM32K unit.
+ */
+
+CHIP ROM32K {
+
+    IN  address[15];
+    OUT out[16];
+
+    BUILTIN ROM32K;
+}

tools/builtInChips/Register.hdl

@@ -0,0 +1,19 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Register.hdl
+
+/**
+ * 16-Bit register. 
+ * If load[t-1]=1 then out[t] = in[t-1]
+ * else out does not change (out[t] = out[t-1])
+ */
+
+CHIP Register {
+
+    IN  in[16], load;
+    OUT out[16];
+
+    BUILTIN Register;
+    CLOCKED in, load;
+}

tools/builtInChips/Screen.hdl

@@ -0,0 +1,35 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Screen.hdl
+
+/**
+ * The Screen (memory map).
+ * Functions exactly like a 16-bit 8K RAM:
+ *    1. out(t)=Screen[address(t)](t)
+ *    2. If load(t-1) then Screen[address(t-1)](t)=in(t-1)
+ *
+ * The built-in chip implementation has the side effect of continuously 
+ * refreshing a visual 256 by 512 black-and-white screen, simulated 
+ * by the simulator. Each row in the visual screen is represented 
+ * by 32 consecutive 16-bit words, starting at the top left corner 
+ * of the visual screen. Thus the pixel at row r from the top and 
+ * column c from the left (0<=r<=255, 0<=c<=511) reflects the c%16 
+ * bit (counting from LSB to MSB) of the word found in 
+ * Screen[r*32+c/16]. 
+ */
+
+CHIP Screen {
+
+    IN  in[16],    // what to write
+    load,          // write-enable bit
+    address[13];   // where to read/write
+    OUT out[16];   // Screen value at the given address
+
+    BUILTIN Screen;
+    CLOCKED in, load;
+}
+
+
+
+ 

tools/builtInChips/Xor.hdl

@@ -0,0 +1,16 @@
+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: tools/builtIn/Xor.hdl
+
+/**
+ *  Exclusive-or gate: out = !(a == b).
+ */
+
+CHIP Xor {
+
+    IN  a, b;
+    OUT out;
+
+    BUILTIN Xor;
+}