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nand2tetris/projects/03/a/RAM8.hdl
2021-04-21 17:01:42 +03:00

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM8.hdl
/**
* Memory of 8 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM8 {
IN in[16], load, address[3];
OUT out[16];
PARTS:
Register(in=in, load=reg0l, out=reg0);
Register(in=in, load=reg1l, out=reg1);
Register(in=in, load=reg2l, out=reg2);
Register(in=in, load=reg3l, out=reg3);
Register(in=in, load=reg4l, out=reg4);
Register(in=in, load=reg5l, out=reg5);
Register(in=in, load=reg6l, out=reg6);
Register(in=in, load=reg7l, out=reg7);
DMux8Way(in=load, sel=address, a=reg0l, b=reg1l, c=reg2l, d=reg3l, e=reg4l, f=reg5l, g=reg6l, h=reg7l);
Mux8Way16(a=reg0, b=reg1, c=reg2, d=reg3, e=reg4, f=reg5, g=reg6, h=reg7, sel=address, out=out);
}