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some drc tweaks

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This commit is contained in:
Stepan Usatiuk
2025-02-12 22:49:00 +01:00
parent 3548284334
commit 515ab66f02
2 changed files with 5 additions and 4 deletions
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1
Board/cardboy/cardboy.kicad_pcb
View File

@@ -28486,6 +28486,7 @@
(property "Reference" "BT1"
(at 0 -2.54 90)
(layer "F.SilkS")
(hide yes)
(uuid "4a2747a6-14cb-47c4-863b-d33f85d0e306")
(effects
(font

8
Board/cardboy/cardboy.kicad_pro
View File

@@ -79,14 +79,14 @@
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"holes_co_located": "warning",
"holes_co_located": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"lib_footprint_mismatch": "ignore",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@@ -106,12 +106,12 @@
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_dangling": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"via_dangling": "error",
"zones_intersect": "error"
},
"rules": {